Architecture of 8085 Microprocessor


Architecture of 8085 Microprocessor
The block diagram explaining the architecture of Intel 8085 Microprocessor is shown in Fig.2.2. It is available generally as a 40 pin IC package and uses +5V for power. It can run at a maximum frequency of 3 MHz. The modified versions of the 8085 processor have these minimum common features and functional similarities. 8085 is called as an 8-bit processor since its data length is 8-bit and has a data bus of 8-bits wide. It has an addressing capability of 16-bit. i.e., it can address 216 = 64 K bytes of memory (1 K byte =1024 byte).8085 consists of various units and each unit performs its own functions. The various units of a microprocessor are listed below
· Accumulator
· Arithmetic and logic Unit
· General purpose register
· Program counter
· Stack pointer
· Temporary register
· Flags
· Instruction register and Decoder
· Timing and Control unit
· Interrupt control
· Serial Input/output control
· Address buffer and Address-Data buffer
· Address bus and Data bus

Figure:- Internal Architecture of 8085
Instruction register and decoder
It is an 8-bit register. When an instruction is fetched from memory then it is stored in the Instruction register. Instruction decoder decodes the information present in the Instruction register.
Timing and control unit
It provides timing and control signal to the microprocessor to perform operations. Following are the timing and control signals, which control external and internal circuits −
  • Control Signals: READY, RD’, WR’, ALE
  • Status Signals: S0, S1, IO/M’
  • DMA Signals: HOLD, HLDA
  • RESET Signals: RESET IN, RESET OUT
Interrupt control
As the name suggests it controls the interrupts during a process. When a microprocessor is executing a main program and whenever an interrupt occurs, the microprocessor shifts the control from the main program to process the incoming request. After the request is completed, the control goes back to the main program.
There are 5 interrupt signals in 8085 microprocessor: INTR, RST 7.5, RST 6.5, RST 5.5, TRAP.
Serial Input/output control
It controls the serial data communication by using these two instructions: SID (Serial input data) and SOD (Serial output data).
Address buffer and address-data buffer
The content stored in the stack pointer and program counter is loaded into the address buffer and address-data buffer to communicate with the CPU. The memory and I/O chips are connected to these buses; the CPU can exchange the desired data with the memory and I/O chips.
Address bus and data bus
Data bus carries the data to be stored. It is bidirectional, whereas address bus carries the location to where it should be stored and it is unidirectional. It is used to transfer the data & Address I/O devices.
The flag register 
This is a special 8-bit register. Each bit of flag register is quite independent of each other. In all other registers, each bit is just part of a single binary byte value and hence each bit would have a numerical value. The flag is an 8-bit register used to indicate the status of the recent arithmetic or logic operation. It may be set or reset after an arithmetic or logical operation according to the condition of the processed data. The five flag bits are Zero (Z), Carry (CY), Sign (S), Parity (P), and Auxiliary Carry (AC) flags and their bit positions in the flag register are shown in Figure. The remaining three bits (D1, D3 and D5) of the flag register remain unassigned and they are marked with an X to show that they are not used and are don’t cares. Any flag register bit is said to be ‘set’ when its value is 1 and is said to be ‘cleared’ when its value is 0. The most commonly used flags are Zero, Carry, and Sign. AC flags can not be accessed externally. 

Figure:- Flag register
Sign flag (S) 
The S flag is just a copy of the bit D7 (Most Significant Bit-MSB) of the accumulator. A negative number has a 1 in bit 7 and a positive number has a 0 in bit 7. So this flag indicates the sign of the number. It may be recalled that signed magnitude numbers use a 1 to indicate a negative number and 0 to indicate a positive number. This flag can be used in signed arithmetic operations. 
Zero flag (Z) 
The zero flag is set if an arithmetic operation results in a zero. It ‘sets’ or changes to a binary 1 if it sees a zero result in accumulator otherwise it always stays at binary 0. The Z flag only goes to a one state if all bits in the latest result (available at accumulator) are zero. 
Carry flag (C) 
The carry flay is set when a carry is generated in the process of an arithmetic operation out of accumulator. When addition is carried out, it sometimes results in a 9th bit being carried over to the next byte. The C flag copies the value of the carry from D7, which is an extra bit. It also reflects the value of the ‘borrow’ in subtractions. 
Auxiliary Carry flag (AC) 
The auxiliary carry flag is set when an auxiliary carry is generated in the process of an arithmetic operation in the accumulator, i.e., when a carry results from bit D3 and passes on to D4 (from the lower nibble to the higher nibble). This carry which is resulted from addition of lower nibble is also called as half-carry. It may also occur in the process of a subtraction operation. In other words this flag is set if the subtraction operation results in borrow. 
Parity flag (P) 
The parity flag is set if the content of the accumulator after an arithmetic operation has an even number of 1’s. Otherwise the parity flag is reset. It is set for operation in the even parity mode.
Instruction register and decoder
It is an 8-bit register. When an instruction is fetched from memory then it is stored in the Instruction register. Instruction decoder decodes the information present in the Instruction register.
Timing and control unit
It provides timing and control signal to the microprocessor to perform operations. Following are the timing and control signals, which control external and internal circuits −
  • Control Signals: READY, RD’, WR’, ALE
  • Status Signals: S0, S1, IO/M’
  • DMA Signals: HOLD, HLDA
  • RESET Signals: RESET IN, RESET OUT
Interrupt control
As the name suggests it controls the interrupts during a process. When a microprocessor is executing a main program and whenever an interrupt occurs, the microprocessor shifts the control from the main program to process the incoming request. After the request is completed, the control goes back to the main program.
There are 5 interrupt signals in 8085 microprocessor: INTR, RST 7.5, RST 6.5, RST 5.5, TRAP.
Serial Input/output control
It controls the serial data communication by using these two instructions: SID (Serial input data) and SOD (Serial output data).
Address buffer and address-data buffer
The content stored in the stack pointer and program counter is loaded into the address buffer and address-data buffer to communicate with the CPU. The memory and I/O chips are connected to these buses; the CPU can exchange the desired data with the memory and I/O chips.
Address bus and data bus
Data bus carries the data to be stored. It is bidirectional, whereas address bus carries the location to where it should be stored and it is unidirectional. It is used to transfer the data & Address I/O devices.


REFERENCES
  1. R. S. Gaonkar, Microprocessor Architecture, Programming, and Applications with the 8085, Fifth Edition, Penram International Publishing (India) Private Limited.
  2. S Ghoshal, Microprocessor Based System Design, Macmillan India Limited, 1996
  3. M. Mano, Digital Logic and Computer Design, Prentice – Hall India
  4. B. Ram - Fundamentals of Microprocessor and Microcontrollers
  5. “Microprocessors: Principles and Applications” by A Pal
  6. “Microprocessors and Microcontrollers : Architecture, Programming and Interfacing Using 8085, 8086 and 8051” by Soumitra Kumar Mandal
  7. “Introduction to Microprocessors and Microcontrollers” by Crisp John Crisp
  8. “Microprocessors And Microcontrollers” by A Nagoor Kani
  9. “Microprocessors And Microcontrollers : Architecture, Programming and System Design 8085, 8086, 8051, 8096” by KRISHNA KANT
  10. 8 - Bit Microprocessor” by Vibhute

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