Fetch Cycle, Execute Cycle And Instruction Cycle

Time required to execute and fetch an entire instruction is called instruction cycle. It consists:

·         Fetch cycle – The next instruction is fetched by the address stored in program counter (PC) and then stored in the instruction register.

·         Decode instruction – Decoder interprets the encoded instruction from instruction register.

·         Reading effective address – The address given in instruction is read from main memory and required data is fetched. The effective address depends on direct addressing mode or indirect addressing mode.

·         Execution cycle – consists memory read (MR), memory write (MW), input output read (IOR) and input output write (IOW)

The time required by the microprocessor to complete an operation of accessing memory or input/output devices is called machine cycle. One time period of frequency of microprocessor is called t-state. A t-state is measured from the falling edge of one clock pulse to the falling edge of the next clock pulse. Fetch cycle takes four t-states and execution cycle takes three t-states.

REFERENCES

1. R. S. Gaonkar, Microprocessor Architecture, Programming, and Applications with the 8085, Fifth Edition, Penram International Publishing (India) Private Limited.
2. S Ghoshal, Microprocessor Based System Design, Macmillan India Limited, 1996
3. M. Mano, Digital Logic and Computer Design, Prentice – Hall India
4. B. Ram - Fundamentals of Microprocessor and Microcontrollers
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